Welcome to Forethought India One-on-One Courses. Our program is designed to provide students with the skills and knowledge necessary to excel in their chosen profession. Our instructor for this course is Researcher Mital Nitish at Imperial College London.
The "An Introduction to VLSI Design" course provides a comprehensive understanding of Very Large Scale Integration (VLSI) design principles and techniques. This course covers fundamental concepts, including digital logic design, semiconductor fundamentals, CMOS technology, and the VLSI design process. As students progress, they delve into more advanced topics such as MOS transistor theory, logic families, combinational and sequential circuit design, memory and register design, and the use of VLSI Computer-Aided Design (CAD) tools. Additionally, the course explores crucial areas like low power VLSI design, system-on-chip (SoC) architecture, and testing methods. Students will also gain insights into industry trends and research areas in VLSI design. The course concludes with project presentations, allowing students to apply their knowledge in practical design projects. Whether you're new to VLSI or seeking to expand your expertise, this course provides a solid foundation and advanced insights into the field.
At the end of the program, students will receive a certificate & performance letter by the eductor indicating that they have completed the program and acquired the necessary skills and knowledge to excel in their chosen profession.
An Introduction to VLSI Design
Mital Nitish works on synthetic data generation using AI for AI, including the use of 3D rendering engines like Unity for environment modelling. He particularly focus on earth observation.
He has done his Bachelor's and Masters in Electrical Engineering, Communications and Signal Processing from IIT-Bombay, 2010-15.
He graduated in 2020 from Imperial College London working on erasure codes and error-correcting codes for distributed storage and distributed computing, secure multiparty computation, and wireless physical layer.
He was a recipient of a fellowship from the H2020 Marie-Sklodowska Curie Scavenge training network.